﻿ 滑动短时傅里叶变换的FPGA实现
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 应用科技  2020, Vol. 47 Issue (2): 67-71  DOI: 10.11991/yykj.201906005 0

### 引用本文

SHAO Rui, FU Yongqing. FPGA implementation of sliding short-time Fourier transform[J]. Applied Science and Technology, 2020, 47(2): 67-71. DOI: 10.11991/yykj.201906005.

### 文章历史

FPGA implementation of sliding short-time Fourier transform
SHAO Rui, FU Yongqing
College of Information and Communication Engineering, Harbin Engineering University, Harbin 150001, China
Abstract: In order to solve the problem that only the frequency component contained in the signal can be obtained after Fourier transform analysis of the chaotic signal, and the time localization information about the frequency component can not be obtained, we adopted the method of short-time Fourier transform to study the mathematical formula and physical meaning of the short-time Fourier transform, and then proposed to use the information provided by Altera company on FPGA. IP core resource could realize the function of short-time Fourier transform, and carry on the function simulation in Modelsim software. The experiment verifies that the chaotic signal can be analyzed very well by short-time Fourier transform.
Keywords: sliding    short-time Fourier transform    chaos    field programmable gate array (FPGA)    Modelsim    Fourier transform    first input first output    read-only memory

1 滑动短时傅里叶变换的原理

 ${X_n}\left( {{{\rm{e}}^{{\rm{j}}\omega }}} \right) = \sum\limits_{m = - \infty }^\infty x (m)w(n - m){{\rm{e}}^{ - {\rm{j}}\omega n}}$

2 FPGA的介绍及设计环境

3 设计思路总框图

FIFO核和ROM核的使用中设计一个共同的使能，当FIFO核有数据读出时，ROM核也会有数据读出，两者同步输出：送入乘法器进行加窗计算，输出数据位宽24位，送给后端的FFT模块进行计算，根据FFT的输出有效信号source_valid的高低指示，进行判断信号特征，解调信号。

4 FPGA具体实现 4.1 滑动窗口设计

4.2 Hanning窗函数设计

Hanning窗使用了ROM[10]，ROM采用Altera公司提供的IP核，ROM中的地址线由于只能为2的整次数幂，取最贴近码元宽度的512作为该ROM的地址数，数据位宽为A/DC的输出数据宽度12，ROM值在初始化时被赋予了汉宁窗的数据，其结构如图8所示。

Hanning窗数据仿真波形为图9，在每个时钟的上升沿数据从ROM端读出，其数据波形如图中的q所示。

4.3 乘法器设计

4.4 傅里叶变换模块设计